Dependency inversions
This commit is contained in:
@ -1,42 +1,57 @@
|
||||
package fabrik.simulator.pic16f84;
|
||||
|
||||
import fabrik.simulator.pic16f84.interfaces.DataRegisterInterface;
|
||||
import fabrik.simulator.pic16f84.interfaces.EEPROMInterface;
|
||||
import fabrik.simulator.pic16f84.interfaces.IOPortInterface;
|
||||
|
||||
import java.util.Arrays;
|
||||
|
||||
public class DataRegister {
|
||||
private static final int INDF = 0x0;
|
||||
private static final int PCL = 0x2;
|
||||
private static final int STATUS = 0x3;
|
||||
private static final int FSR = 0x4;
|
||||
private static final int PORTA = 0x5;
|
||||
private static final int PORTB = 0x6;
|
||||
private static final int PCLATH = 0xA;
|
||||
private static final int INTCON = 0xB;
|
||||
public class DataRegister implements DataRegisterInterface {
|
||||
private final int INDF = 0x0;
|
||||
private final int PCL = 0x2;
|
||||
private final int STATUS = 0x3;
|
||||
private final int FSR = 0x4;
|
||||
private final int PORTA = 0x5;
|
||||
private final int PORTB = 0x6;
|
||||
private final int PCLATH = 0xA;
|
||||
private final int INTCON = 0xB;
|
||||
|
||||
private static final int EEDATA = 0x08;
|
||||
private static final int EEADR = 0x09;
|
||||
private static final int EECON1 = 0x88;
|
||||
private static final int EECON2 = 0x89;
|
||||
private final int EEDATA = 0x08;
|
||||
private final int EEADR = 0x09;
|
||||
private final int EECON1 = 0x88;
|
||||
private final int EECON2 = 0x89;
|
||||
|
||||
private static final int TRISA = 0x85;
|
||||
private static final int TRISB = 0x86;
|
||||
private final int TRISA = 0x85;
|
||||
private final int TRISB = 0x86;
|
||||
|
||||
private static final int C = 0x0;
|
||||
private static final int DC = 0x1;
|
||||
private static final int Z = 0x2;
|
||||
private static final int RP0 = 0x5;
|
||||
private final int C = 0x0;
|
||||
private final int DC = 0x1;
|
||||
private final int Z = 0x2;
|
||||
private final int RP0 = 0x5;
|
||||
|
||||
|
||||
private static final int [] dataRegister = new int[0xFF];
|
||||
private static final int [] syncedRegisters = {INDF, PCL, STATUS, FSR, PCLATH, INTCON};
|
||||
private static final int [] eepromRegisters = {EEDATA, EEADR, EECON1, EECON2};
|
||||
public static final int [] ioRegisters = {PORTA, PORTB, TRISA, TRISB};
|
||||
private final int [] dataRegister = new int[0xFF];
|
||||
private final int [] syncedRegisters = {INDF, PCL, STATUS, FSR, PCLATH, INTCON};
|
||||
private final int [] eepromRegisters = {EEDATA, EEADR, EECON1, EECON2};
|
||||
public final int [] ioRegisters = {PORTA, PORTB, TRISA, TRISB};
|
||||
|
||||
private final EEPROMInterface eeprom;
|
||||
private final PreScaler preScaler;
|
||||
private final IOPortInterface ioPorts;
|
||||
|
||||
public static void initDataRegister() {
|
||||
public DataRegister (EEPROMInterface eeprom, PreScaler preScaler, IOPortInterface ioPorts) {
|
||||
this.eeprom = eeprom;
|
||||
this.preScaler = preScaler;
|
||||
this.ioPorts = ioPorts;
|
||||
initOrReset();
|
||||
}
|
||||
|
||||
|
||||
private void initOrReset () {
|
||||
dataRegister[PCL] = 0b0;
|
||||
dataRegister[STATUS] = 0b00011000;
|
||||
dataRegister[PCLATH] = 0b0;
|
||||
dataRegister[INTCON] = 0b0;
|
||||
|
||||
dataRegister[0x81] = 0b11111111;
|
||||
dataRegister[0x80 + PCL] = dataRegister[PCL];
|
||||
dataRegister[0x80 + STATUS] = dataRegister[STATUS];
|
||||
@ -47,11 +62,15 @@ public class DataRegister {
|
||||
carryFlag = 0;
|
||||
zeroFlag = 0;
|
||||
digitCarryFlag = 0;
|
||||
IOPorts.resetTRIS();
|
||||
ioPorts.resetTRIS();
|
||||
System.out.println(Arrays.toString(dataRegister));
|
||||
}
|
||||
|
||||
private static boolean isSyncedRegister (int address){
|
||||
public void initDataRegister() {
|
||||
initOrReset();
|
||||
}
|
||||
|
||||
private boolean isSyncedRegister (int address){
|
||||
for (int register : syncedRegisters){
|
||||
if (address == register || address == 0x80 + register){
|
||||
return true;
|
||||
@ -60,11 +79,11 @@ public class DataRegister {
|
||||
return false;
|
||||
}
|
||||
|
||||
public static int[] getDataRegister() {
|
||||
public int[] getDataRegister() {
|
||||
return dataRegister;
|
||||
}
|
||||
|
||||
private static int determineIndirectAndChange (int address){
|
||||
private int determineIndirectAndChange (int address){
|
||||
if (address == INDF || address == 0x80 + INDF) {
|
||||
return dataRegister[FSR];
|
||||
}
|
||||
@ -72,29 +91,29 @@ public class DataRegister {
|
||||
return address;
|
||||
}
|
||||
|
||||
public static int getFSR (){
|
||||
public int getFSR (){
|
||||
return dataRegister[FSR];
|
||||
}
|
||||
|
||||
private static int bank() {
|
||||
private int bank() {
|
||||
return ((dataRegister[STATUS] >> RP0) & 1) * 0x80;
|
||||
}
|
||||
|
||||
public static int getRegister(int fileAddress){
|
||||
public int getRegister(int fileAddress){
|
||||
int address = determineIndirectAndChange (fileAddress);
|
||||
if (bank () + address == EECON2)
|
||||
return 0;
|
||||
return dataRegister[bank() + address];
|
||||
}
|
||||
|
||||
public static void setRegister(int fileAddress, int content){
|
||||
public void setRegister(int fileAddress, int content){
|
||||
int address = determineIndirectAndChange (fileAddress);
|
||||
if (Arrays.stream(ioRegisters).anyMatch(i -> i == address)){
|
||||
IOPorts.setRegister(bank() + address, content);
|
||||
ioPorts.setRegister(bank() + address, content);
|
||||
return;
|
||||
}
|
||||
if (Arrays.stream(eepromRegisters).anyMatch(i -> i == address)){
|
||||
EEPROM.parse(bank() + address, content, 0b11);
|
||||
eeprom.parse(bank() + address, content, 0b11);
|
||||
return;
|
||||
}
|
||||
if (fileAddress == PCL || fileAddress == 0x80 + PCL){
|
||||
@ -110,28 +129,28 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
if (address == 1)
|
||||
PreScaler.resetFromRegister();
|
||||
preScaler.resetFromRegister();
|
||||
}
|
||||
|
||||
public static int getBit(int fileAddress, int bit) {
|
||||
public int getBit(int fileAddress, int bit) {
|
||||
int address = determineIndirectAndChange (fileAddress);
|
||||
if (bank() + address == EECON2)
|
||||
return 0;
|
||||
return (dataRegister[bank() + address] >> bit) & 1;
|
||||
}
|
||||
|
||||
public static int getDirectBit(int address, int bit){
|
||||
public int getDirectBit(int address, int bit){
|
||||
return (dataRegister[address] >> bit) & 1;
|
||||
}
|
||||
|
||||
public static void clearBit(int fileAddress, int bit) {
|
||||
public void clearBit(int fileAddress, int bit) {
|
||||
int address = determineIndirectAndChange (fileAddress);
|
||||
if (Arrays.stream(ioRegisters).anyMatch(i -> i == address)){
|
||||
IOPorts.clearBit(bank() + address, bit);
|
||||
ioPorts.clearBit(bank() + address, bit);
|
||||
return;
|
||||
}
|
||||
if (Arrays.stream(eepromRegisters).anyMatch(i -> i == address)){
|
||||
EEPROM.parse(bank () + address, bit, 0b00);
|
||||
eeprom.parse(bank () + address, bit, 0b00);
|
||||
return;
|
||||
}
|
||||
if (!isSyncedRegister(address)) {
|
||||
@ -149,17 +168,17 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
if (address == 1)
|
||||
PreScaler.resetFromRegister();
|
||||
preScaler.resetFromRegister();
|
||||
}
|
||||
|
||||
public static void setBit(int fileAddress, int bit) {
|
||||
public void setBit(int fileAddress, int bit) {
|
||||
int address = determineIndirectAndChange (fileAddress);
|
||||
if (Arrays.stream(ioRegisters).anyMatch(i -> i == address)){
|
||||
IOPorts.setBit(bank() + address, bit);
|
||||
ioPorts.setBit(bank() + address, bit);
|
||||
return;
|
||||
}
|
||||
if (Arrays.stream(eepromRegisters).anyMatch(i -> i == address)){
|
||||
EEPROM.parse(bank () + address, bit, 0b10);
|
||||
eeprom.parse(bank () + address, bit, 0b10);
|
||||
return;
|
||||
}
|
||||
if (!isSyncedRegister(address)) {
|
||||
@ -177,10 +196,10 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
if (address == 1)
|
||||
PreScaler.resetFromRegister();
|
||||
preScaler.resetFromRegister();
|
||||
}
|
||||
|
||||
public static void setDirectBit (int fileAddress, int bit, int value){
|
||||
public void setDirectBit (int fileAddress, int bit, int value){
|
||||
if (getDirectBit(fileAddress, bit) == 0 && value == 1){
|
||||
dataRegister[fileAddress] += (int) Math.pow(2, bit);
|
||||
} else if (getDirectBit(fileAddress, bit) == 1 && value == 0){
|
||||
@ -188,14 +207,14 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
|
||||
private static int programCounter = 0;
|
||||
private int programCounter = 0;
|
||||
|
||||
private static void writeToPCL(){
|
||||
private void writeToPCL(){
|
||||
dataRegister[PCL] = programCounter & 0xFF;
|
||||
dataRegister[0x80 + PCL] = dataRegister[PCL];
|
||||
}
|
||||
|
||||
public static void increasePC (){
|
||||
public void increasePC (){
|
||||
if (programCounter != 0x3FF) {
|
||||
programCounter++;
|
||||
}
|
||||
@ -205,28 +224,28 @@ public class DataRegister {
|
||||
writeToPCL();
|
||||
}
|
||||
|
||||
public static void setPC (int value){
|
||||
public void setPC (int value){
|
||||
programCounter = value + ((getRegister(PCLATH) & 0b11000) << 8);
|
||||
writeToPCL();
|
||||
}
|
||||
|
||||
public static void resetPC () {
|
||||
public void resetPC () {
|
||||
programCounter = 0;
|
||||
}
|
||||
|
||||
public static int getPC(){
|
||||
public int getPC(){
|
||||
return programCounter;
|
||||
}
|
||||
|
||||
private static void setFlags() {
|
||||
private void setFlags() {
|
||||
carryFlag = getDirectBit(STATUS, C);
|
||||
digitCarryFlag = getDirectBit(STATUS, DC);
|
||||
zeroFlag = getDirectBit(STATUS, Z);
|
||||
}
|
||||
|
||||
private static int zeroFlag = 0;
|
||||
private int zeroFlag = 0;
|
||||
|
||||
public static void determineZeroFlag(int result){
|
||||
public void determineZeroFlag(int result){
|
||||
if (result == 0){
|
||||
zeroFlag = 1;
|
||||
if (getBit(STATUS, Z) == 0){
|
||||
@ -243,13 +262,13 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
|
||||
public static int getZeroFlag(){
|
||||
public int getZeroFlag(){
|
||||
return zeroFlag;
|
||||
}
|
||||
|
||||
private static int carryFlag = 0;
|
||||
private int carryFlag = 0;
|
||||
|
||||
public static void setCarryFlag(int value){
|
||||
public void setCarryFlag(int value){
|
||||
carryFlag = value;
|
||||
if (value == 1){
|
||||
if (getBit(STATUS, C) == 0){
|
||||
@ -265,7 +284,7 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
|
||||
public static void determineCarryFlag (int result){
|
||||
public void determineCarryFlag (int result){
|
||||
if (result > 0xFF){
|
||||
setCarryFlag(1);
|
||||
}
|
||||
@ -274,13 +293,13 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
|
||||
public static int getCarryFlag (){
|
||||
public int getCarryFlag (){
|
||||
return carryFlag;
|
||||
}
|
||||
|
||||
private static int digitCarryFlag = 0;
|
||||
private int digitCarryFlag = 0;
|
||||
|
||||
public static void setDigitCarryFlag(int value){
|
||||
public void setDigitCarryFlag(int value){
|
||||
digitCarryFlag = value;
|
||||
if (value == 1){
|
||||
if (getBit(STATUS, DC) == 0){
|
||||
@ -296,7 +315,7 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
|
||||
public static void determineDigitCarryFlag(int result){
|
||||
public void determineDigitCarryFlag(int result){
|
||||
if (result >> 4 == 1){
|
||||
setDigitCarryFlag(1);
|
||||
}
|
||||
@ -305,30 +324,30 @@ public class DataRegister {
|
||||
}
|
||||
}
|
||||
|
||||
public static int getDigitCarryFlag(){
|
||||
public int getDigitCarryFlag(){
|
||||
return digitCarryFlag;
|
||||
}
|
||||
|
||||
public static void setDirectRegister(int fileAddress, int content) {
|
||||
public void setDirectRegister(int fileAddress, int content) {
|
||||
dataRegister[fileAddress] = content;
|
||||
}
|
||||
|
||||
|
||||
public static int getPCL() {
|
||||
public int getPCL() {
|
||||
return PCL;
|
||||
}
|
||||
public static int getSTATUS() {
|
||||
public int getSTATUS() {
|
||||
return STATUS;
|
||||
}
|
||||
|
||||
public static int getPCLATH() {
|
||||
public int getPCLATH() {
|
||||
return PCLATH;
|
||||
}
|
||||
public static int getINTCON() {
|
||||
public int getINTCON() {
|
||||
return INTCON;
|
||||
}
|
||||
|
||||
public static int getDirectRegister(int address) {
|
||||
public int getDirectRegister(int address) {
|
||||
return dataRegister[address];
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user