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FIX Stack & IOPorts

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This commit is contained in:
Paul Martin
2024-05-02 00:29:33 +02:00
parent 3c406378b2
commit f932a141ce
3 changed files with 13 additions and 15 deletions
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20
src/main/java/fabrik/simulator/pic16f84/IOPorts.java
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@ -13,25 +13,23 @@ public class IOPorts {
public static void setBit (int address, int bit){
if (address < 7) {
dataLatch[address - 5] |= (1 << bit);
dataLatch[address - PORTA] |= (1 << bit);
}
else{
trisLatch[address - 0x85] |= (1 << bit);
trisLatch[address - TRISA] |= (1 << bit);
}
refreshPorts();
}
public static void clearBit(int address, int bit) {
if (address < 7) {
if (DataRegister.getDirectBit(address, bit) == 1) {
int register = DataRegister.getDirectRegister(address);
dataLatch[address-A] = register - (int) Math.pow(2, bit);
if (((dataLatch[address-PORTA] >> bit)&1) == 1){
dataLatch[address-PORTA] -= (int) Math.pow(2, bit);
}
}
else{
if (DataRegister.getDirectBit(address, bit) == 1) {
int register = DataRegister.getDirectRegister(address);
trisLatch[address-A] = register - (int) Math.pow(2, bit);
trisLatch[address-TRISA] -= (int) Math.pow(2, bit);
}
}
refreshPorts();
@ -39,16 +37,16 @@ public class IOPorts {
public static void setRegister(int address, int content) {
if (address < 7) {
dataLatch[address - 5] = content;
dataLatch[address - PORTA] = content;
}
else{
trisLatch[address - 0x85] = content;
trisLatch[address - TRISA] = content;
}
refreshPorts();
}
private static void refreshPorts() {
DataRegister.setDirectRegister(PORTA, (~((~dataLatch[A])&0xFF | trisLatch[A])) & 0x1F);
DataRegister.setDirectRegister(PORTB, (~((~dataLatch[B])&0xFF | trisLatch[B])) & 0xFF);
System.out.println("PORTA: " + DataRegister.getDirectRegister(PORTA) + "; DATALATCHA: " + dataLatch[A] + "; TRISA: " + trisLatch[A]);
System.out.println("PORTB: " + DataRegister.getDirectRegister(PORTB) + "; DATALATCHB: " + dataLatch[B] + "; TRISB: " + trisLatch[B]);
}
}